MPXV7002DP中文资料

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MPXV7002DP中文资料
2023年11月24日发(作者:不毛之地毛的意思)

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Freescale Semiconductor

Technical Data

Document Number: MPXV7002

Rev 0, 09/2005

Integrated Silicon Pressure Sensor

On-Chip Signal Conditioned,

Temperature Compensated and

Calibrated

The MPXV7002 ries piezoresistive transducers are state-of-the-art

monolithic silicon pressure nsors designed for a wide range of applications, but

particularly tho employing a microcontroller or microprocessor with A/D inputs.

This transducer combines advanced micromachining techniques, thin-film

metallization, and bipolar processing to provide an accurate, high level analog

output signal that is proportional to the applied pressure.

Features

2.5% Typical Error over +10°C to +60°C with Auto Zero

6.25% Maximum Error over +10°C to +60°C without Auto Zero

Ideally Suited for Microprocessor or Microcontroller-Bad Systems

Thermoplastic (PPS) Surface Mount Package

Temperature Compensated over +10° to +60°C

Patented Silicon Shear Stress Strain Gauge

Available in Differential and Gauge Configurations

Hospital Beds

HVAC

Respiratory Systems

Process Control

ORDERING INFORMATION

Device Ca MPX SeriesPacking Device

TypeNo.Order No.OptionsMarking

Options

482AMPXV7002GC6URailsMPXV7002GPorted Gauge, Axial Port, SMT

482AGauge, Axial Port, SMTMPXV7002GC6T1Tape & MPXV7002G

1369Gauge, Side Port, SMTMPXV7002GPTraysMPXV7002G

1351Differential, Dual Port, MPXV7002DPTraysMPXV7002G

1351Differential, Dual Port, MPXV7002DPT1Tape & MPXV7002G

MPXV7002

SERIES

INTEGRATED

PRESSURE SENSOR

-2 to 2 kPa (-0.3 to 0.3 psi)

0.5 to 4.5 V OUTPUT

SMALL OUTLINE PACKAGE

MPXV7002GC6U

CASE 482A-01

Typical Applications

MPXV7002GP

CASE 1369-01

MPXV7002DP

CASE 1351-01

SMALL OUTLINE PACKAGE

PIN NUMBERS

(1)

1N/C5N/C

2V6N/C

3Gnd7N/C

4V8N/C

S

out

SMALL OUTLINE PACKAGE (MPXV7002 SERIES)

Elements

SMT

SMTReel

Reel

V

S

1.Pins 1, 5, 6, 7, and 8 are internal device

connections. Do not connect to external

circuitry or ground. Pin 1 is noted by the

notch in the lead.

Sensing

Element

Thin Film

Temperature

Compensation

and

Gain Stage #1

Gain Stage #2

and

Ground

Reference

Shift Circuitry

V

out

GND

Pins 1 and 5 through 8 are NO CONNECTS

for surface mount package

© Freescale Semiconductor, Inc., 2005. All rights rerved.

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Figure1. Fully Integrated Pressure Sensor Schematic

Table1. Maximum Ratings

(1)

RatingSymbolValueUnit

Maximum Pressure (P1 > P2)P8.0kPa

Storage TemperatureT–30 to +100°C

Operating TemperatureT10 to +60°C

max

stg

A

1.Exposure beyond the specified limits may cau permanent damage or degradation to the device.

Table2. Operating Characteristics V = 5.0 Vdc, T = 25°C unless otherwi noted. Decoupling circuit shown in Figure 3

(

SA

required to meet specification.)

CharacteristicSymbolMinTypMaxUnit

Pressure RangeP–2.02.0kPa

(1)

Supply Voltage4.755.05.25Vdc

(2)

Supply CurrentI10mAdc

Pressure Offt(10 to 60°C)V2.252.52.75Vdc

(3)

@ V = 5.0 Volts

S

Full Scale Output

(4)

@ V = 5.0 Volts

S

Full Scale Span

(5)

@ V = 5.0 Volts

S

Accuracy

(6)(7)

SensitivityV/P1.0—-V/kPa

Respon Timet1.0—-ms

(8)

Output Source Current at Full Scale OutputI0.1—-mAdc

Warm-Up Time20—-ms

(9)

1.1.0 kPa (kiloPascal) equals 0.145 psi.

2.Device is ratiometric within this specified excitation range.

3.Offt (V) is defined as the output voltage at the minimum rated pressure.

off

4.Full Scale Output (V) is defined as the output voltage at the maximum or full rated pressure.

FSO

5.Full Scale Span (V) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the

FSS

minimum rated pressure.

6.Accuracy (error budget) consists of the following:

Linearity:Output deviation from a straight line relationship with pressure over the specified pressure range.

Temperature Hysteresis:Output deviation at any temperature within the operating temperature range, after the temperature is cycled to

and from the minimum or maximum operating temperature points, with zero differential pressure applied.

Pressure Hysteresis:Output deviation at any pressure within the specified range, when this pressure is cycled to and from the

minimum or maximum rated pressure, at 25°C.

TcSpan:Output deviation over the temperature range of 10° to 60°C, relative to 25°C.

TcOfft:Output deviation with minimum rated pressure applied, over the temperature range of 10° to 60°C, relative to

25°C.

Variation from Nominal:The variation from nominal values, for Offt or Full Scale Span, as a percent of V

FSS

, at 25°C.

7.Auto Zero at Factory Installation: Due to the nsitivity of the MPXV7002 Series, external mechanical stress and mounting position can

affect the zero pressure output reading. Autozero is defined as storing the zero pressure output reading and subtracting this from the

device's output during normal operations. Reference AN1636 for specific information. The specified accuracy assumes a maximum

temperature change of ± 5°C between autozero and measurement.

8.Respon Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to

a specified step change in pressure.

9.Warm-up Time is defined as the time required for the product to meet the specified output voltage after the Pressure has been stabilized.

(10 to 60°C)V4.254.54.75Vdc

(10 to 60°C)V3.54.04.5 VVdc

(10 to 60°C)±2.5±6.25%V

OP

V

S

o

off

FSO

FSS

R

O+

FSS

MPXV7002

2Freescale Semiconductor

Sensors

元器件交易网

ON-CHIP TEMPERATURE COMPENSATION, CALIBRATION AND SIGNAL CONDITIONING

The performance over temperature is achieved by

integrating the shear-stress strain gauge, temperature

compensation, calibration and signal conditioning circuitry

onto a single monolithic chip.

Figure2 illustrates the Differential or Gauge configuration

in the basic chip carrier (Ca 482). A gel die coat isolates the

die surface and wire bonds from the environment, while

allowing the pressure signal to be transmitted to the nsor

diaphragm.

The MPXV7002 ries pressure nsor operating

characteristics, and internal reliability and qualification tests

are bad on u of dry air as the pressure media. Media,

other than dry air, may have adver effects on nsor

performance and long-term reliability. Contact the factory for

information regarding media compatibility in your application.

Figure3 shows the recommended decoupling circuit for

interfacing the integrated nsor to the A/D input of a

microprocessor or microcontroller. Proper decoupling of the

power supply is recommended.

Figure4 shows the nsor output signal relative to

pressure input. Typical, minimum, and maximum output

curves are shown for operation over a temperature range of

10° to 60°C using the decoupling circuit shown in Figure3.

The output will saturate outside of the specified pressure

range.

Fluoro Silicone

Gel Die Coat

P1

Wire Bond

Lead

Frame

Die

Stainless

Steel Cap

+5 V

Thermoplastic

Ca

V

out

V

s

IPS

1.0 µFGND470 pF

0.01 µF

OUTPUT

P2

Differential Sensing

Element

Die Bond

Figure2. Cross-Sectional Diagram SOPFigure3. Recommended Power Supply Decoupling

(not to scale)and Output Filtering

(For additional output filtering, plea refer to

Application Note AN1646.)

5.0

4.0

O

u

t

p

u

t

V

o

l

t

a

g

e

(

V

)

3.0

Transfer Function:

V = V × (0.2 × P(kPa)+0.5) ± 6.25% V

outSFSS

V = 5.0 Vdc

S

T= 10 to 60°C

A

TYPICAL

MAX

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PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE

Freescale designates the two sides of the pressure nsor The Pressure (P1) side may be identified by using the

as the Pressure (P1) side and the Vacuum (P2) side. The table below:

Pressure (P1) side is the side containing a gel die coat which

protects the die from harsh media.

Part NumberCa Type

MPXV7002GC6U/GC6T1482A-01Vertical Port Attached

MPXV7002GP1369-01Side with Port Attached

MPXV7002DP1351-01Side with Dual Port Attached

Pressure (P1)

Side Identifier

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total footprint, the packages will lf align when subjected to a

design. The footprint for the surface mount packages must be solder reflow process. It is always recommended to design

the correct size to ensure proper solder connection interface boards with a solder mask layer to avoid bridging and

between the board and the package. With the correct shorting between solder pads.

0.660

16.76

0.100 TYP 8X

2.54

0.060 TYP 8X

1.52

0.300

7.62

0.100 TYP 8X

2.54

inch

mmSCALE 2:1

Figure5. Small Outline Package Footprint

MPXV7002

4Freescale Semiconductor

Sensors

元器件交易网

PACKAGE DIMENSIONS

-A-

4

5

D

8 PL

0.25 (0.010)TBA

MSS

N

-B-

8

G

1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).

5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.

INCHESMILLIMETERS

MINMAXMINMAXDIM

0.4150.42510.5410.79A

0.4150.42510.5410.79B

0.5000.52012.7013.21C

0.0380.0420.961.07D

0.100 BSC2.54 BSCG

0.0020.0100.050.25H

0.0090.0110.230.28J

0.0610.0711.551.80K

M

0.4440.44811.2811.38N

0.7090.72518.0118.41S

0.2450.2556.226.48V

0.1150.1252.923.17W

S

W

V

C

J

K

M

PIN 1 IDENTIFIER

H

-T-

SEATING

PLANE

CASE 482A-01

ISSUE A

SMALL OUTLINE PACKAGE

MPXV7002

Sensors

Freescale Semiconductor5

元器件交易网

PACKAGE DIMENSIONS

PAGE 1 OF 2

CASE 1351-01

ISSUE A

SMALL OUTLINE PACKAGE

MPXV7002

6Freescale Semiconductor

Sensors

元器件交易网

PACKAGE DIMENSIONS

PAGE 2 OF 2

CASE 1351-01

ISSUE A

SMALL OUTLINE PACKAGE

MPXV7002

Sensors

Freescale Semiconductor7

元器件交易网

PACKAGE DIMENSIONS

PAGE 1 OF 2

CASE 1369-01

ISSUE B

SMALL OUTLINE PACKAGE

MPXV7002

8Freescale Semiconductor

Sensors

元器件交易网

PACKAGE DIMENSIONS

PAGE 2 OF 2

CASE 1369-01

ISSUE B

SMALL OUTLINE PACKAGE

MPXV7002

Sensors

Freescale Semiconductor9

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MPXV7002DP中文资料

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